2009-08-01  Aurelien Jarno  <aurelien@aurel32.net>

	* sysdeps/ia64/fpu/libm_error_codes.h: Add error codes for 
	fmodl_infinity, fmod_infinity, fmodf_infinity, cosl_infinity,
	cos_infinity, cosf_infinity, sinl_infinity, sin_infinity, 
	sinf_infinity, tanl_infinity, tan_infinity, and tanf_infinity.
	* sysdeps/ia64/fpu/libm_error.c(__libm_error_support): Pole errors
	for lgamma and pow should set errno to ERANGE, not EDOM. Add code
	to handle fmodl_infinity, fmod_infinity, fmodf_infinity,
	cosl_infinity, cos_infinity, cosf_infinity, sinl_infinity, 
	sin_infinity,sinf_infinity, tanl_infinity, tan_infinity, and
	tanf_infinity.
	* sysdeps/ia64/fpu/e_fmod.S: check for fmod(inf, y).
	* sysdeps/ia64/fpu/e_fmodf.S: check for fmodf(inf, y).
	* sysdeps/ia64/fpu/e_fmodl.S: check for fmodl(inf, y).
	* sysdeps/ia64/fpu/s_fcos.S: check for fcos(inf) and fsin(inf).
	* sysdeps/ia64/fpu/s_fcosf.S: check for fcosf(inf) and fsinf(inf).
	* sysdeps/ia64/fpu/s_fcosl.S: check for fcosl(inf) and fsinl(inf).
	* sysdeps/ia64/fpu/s_tan.S: check for ftan(inf).
	* sysdeps/ia64/fpu/s_tanf.S: check for ftanf(inf).
	* sysdeps/ia64/fpu/s_tanl.S: check for ftanl(inf).

diff --git a/sysdeps/ia64/fpu/e_fmod.S b/sysdeps/ia64/fpu/e_fmod.S
index dbd0a29..87b6a48 100644
--- a/sysdeps/ia64/fpu/e_fmod.S
+++ b/sysdeps/ia64/fpu/e_fmod.S
@@ -75,8 +75,8 @@
 //
 // Special cases
 //====================================================================
-// b=+/-0: return NaN, call libm_error_support
-// a=+/-Inf, a=NaN or b=NaN: return NaN
+// a=+/-Inf or b=+/-0: return NaN, call libm_error_support
+// a=NaN or b=NaN: return NaN
 //
 // Registers used
 //====================================================================
@@ -407,13 +407,13 @@ FMOD_X_NAN_INF:
       nop.m 999
     // also set Denormal flag if necessary
 (p8)  fma.s0 f9=f9,f1,f0
-      nop.i 999 ;;
+(p8)  mov GR_Parameter_TAG=274 ;;
 }
 
 { .mfb
       nop.m 999
 (p8)  fma.d.s0 f8=f8,f1,f0
-      nop.b 999 ;;
+(p8)  br.spnt __libm_error_region;;
 }
 
 { .mfb
diff --git a/sysdeps/ia64/fpu/e_fmodf.S b/sysdeps/ia64/fpu/e_fmodf.S
index 36e5807..9f8cbbd 100644
--- a/sysdeps/ia64/fpu/e_fmodf.S
+++ b/sysdeps/ia64/fpu/e_fmodf.S
@@ -75,8 +75,8 @@
 
 // Special cases
 //====================================================================
-// b=+/-0: return NaN, call libm_error_support
-// a=+/-Inf, a=NaN or b=NaN: return NaN
+// a=+/-Inf or b=+/-0: return NaN, call libm_error_support
+// a=NaN or b=NaN: return NaN
 
 // Registers used
 //====================================================================
@@ -413,13 +413,13 @@ FMOD_X_NAN_INF:
       nop.m 999
     // also set Denormal flag if necessary
 (p8)  fma.s0 f9=f9,f1,f0
-      nop.i 999 ;;
+(p8)  mov GR_Parameter_TAG=275 ;;
 }
 
 { .mfb
       nop.m 999
 (p8)  fma.s.s0 f8=f8,f1,f0
-      nop.b 999 ;;
+(p8)  br.spnt __libm_error_region;;
 }
 
 { .mfb
diff --git a/sysdeps/ia64/fpu/e_fmodl.S b/sysdeps/ia64/fpu/e_fmodl.S
index 3e87eb0..3c38654 100644
--- a/sysdeps/ia64/fpu/e_fmodl.S
+++ b/sysdeps/ia64/fpu/e_fmodl.S
@@ -484,6 +484,11 @@ FMOD_A_NAN_INF:
  (p8)  cmp.ne p7, p0 = GR_SIG_B, r0
        nop.i 0
 }
+{ .mfi
+       nop.m 0
+       fmerge.s FR_X = f8, f8
+       nop.i 0
+}
 ;;
 
 { .mfi
@@ -509,7 +514,12 @@ FMOD_A_NAN_INF:
 { .mfb
        nop.m 0
  (p9)  frcpa.s0 f8, p7 = f8, f9
-       br.ret.sptk b0
+ (p9)  br.ret.sptk b0
+}
+{ .mmb
+       alloc GR_ARPFS = ar.pfs, 1, 4, 4, 0
+       mov GR_Parameter_TAG = 273
+       br.sptk __libm_error_region
 }
 ;;
 
diff --git a/sysdeps/ia64/fpu/libm_error.c b/sysdeps/ia64/fpu/libm_error.c
index 8ef4bb5..cf004fc 100644
--- a/sysdeps/ia64/fpu/libm_error.c
+++ b/sysdeps/ia64/fpu/libm_error.c
@@ -708,15 +708,18 @@ switch(input_tag)
   case gammal_negative:
   case gamma_negative:
   case gammaf_negative:
-  case lgammal_negative:
-  case lgamma_negative:
-  case lgammaf_negative:
   case tgammal_negative:
   case tgamma_negative:
   case tgammaf_negative:
   {
        ERRNO_DOMAIN; break;
   }
+  case lgammal_negative:
+  case lgamma_negative:
+  case lgammaf_negative:
+  {
+       ERRNO_RANGE; break;
+  }
   case ldexpl_overflow:
   case ldexpl_underflow:
   case ldexp_overflow:
@@ -1081,17 +1084,17 @@ switch(input_tag)
   case powl_zero_to_negative:
     /* 0**neg */
     {
-       ERRNO_DOMAIN; break;
+       ERRNO_RANGE; break;
     }
   case pow_zero_to_negative:
     /* 0**neg */
     {
-       ERRNO_DOMAIN; break;
+       ERRNO_RANGE; break;
     }
   case  powf_zero_to_negative:
     /* 0**neg */
     {
-       ERRNO_DOMAIN; break;
+       ERRNO_RANGE; break;
     }
   case powl_neg_to_non_integer:
     /* neg**non_integral */
@@ -1307,6 +1310,21 @@ switch(input_tag)
     {
        ERRNO_DOMAIN; break;
     }
+  case fmodl_infinity:
+    /* fmodl(inf,y) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case fmod_infinity:
+    /* fmod(inf,y) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case fmodf_infinity:
+    /* fmodf(inf,y) */
+    {
+       ERRNO_DOMAIN; break;
+    }
   case coshl_overflow:
     /* coshl overflows */
     {
@@ -1373,6 +1391,51 @@ switch(input_tag)
    {
       ERRNO_RANGE; break;
    }
+  case cosl_infinity:
+    /* cosl(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case cos_infinity:
+    /* cos(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case cosf_infinity:
+    /* cosf(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case sinl_infinity:
+    /* sinl(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case sin_infinity:
+    /* sin(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case sinf_infinity:
+    /* sinf(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case tanl_infinity:
+    /* tanl(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case tan_infinity:
+    /* tan(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
+  case tanf_infinity:
+    /* tanf(inf) */
+    {
+       ERRNO_DOMAIN; break;
+    }
   default:
     break;
 }
diff --git a/sysdeps/ia64/fpu/libm_error_codes.h b/sysdeps/ia64/fpu/libm_error_codes.h
index 4f0945e..96e67c0 100644
--- a/sysdeps/ia64/fpu/libm_error_codes.h
+++ b/sysdeps/ia64/fpu/libm_error_codes.h
@@ -195,7 +195,11 @@ typedef enum
   nextafterl_underflow, nextafter_underflow, 
   nextafterf_underflow,                                /* 267, 268, 269 */
   nexttowardl_underflow, nexttoward_underflow, 
-  nexttowardf_underflow                                /* 270, 271, 272 */
+  nexttowardf_underflow,                               /* 270, 271, 272 */
+  fmodl_infinity, fmod_infinity, fmodf_infinity,       /* 273, 274, 275 */
+  cosl_infinity, cos_infinity, cosf_infinity,          /* 276, 277, 278 */
+  sinl_infinity, sin_infinity, sinf_infinity,          /* 279, 280, 281 */
+  tanl_infinity, tan_infinity, tanf_infinity,          /* 282, 283, 284 */
 } error_types;
 
 #define LIBM_ERROR __libm_error_support
diff --git a/sysdeps/ia64/fpu/s_cos.S b/sysdeps/ia64/fpu/s_cos.S
index fc121fc..24c258c 100644
--- a/sysdeps/ia64/fpu/s_cos.S
+++ b/sysdeps/ia64/fpu/s_cos.S
@@ -174,7 +174,7 @@
 //==============================================================
 // general input registers:
 // r14 -> r26
-// r32 -> r35
+// r32 -> r36
 
 // predicate registers used:
 // p6 -> p11
@@ -260,6 +260,10 @@ GR_SAVE_B0                     = r34
 GR_SAVE_GP                     = r35
 GR_SAVE_r_sincos               = r36
 
+GR_Parameter_X                 = r37
+GR_Parameter_Y                 = r38
+GR_Parameter_RESULT            = r39
+GR_Parameter_TAG               = r40
 
 RODATA
 
@@ -474,7 +478,7 @@ _SINCOS_COMMON:
 // 0x1001a is register_bias + 27.
 // So if f8 >= 2^27, go to large argument routines
 { .mfi
-      alloc         r32                 = ar.pfs, 1, 4, 0, 0
+      alloc         r32                 = ar.pfs, 1, 4, 4, 0
       fclass.m      p11,p0              = f8, 0x0b // Test for x=unorm
       mov           sincos_GR_all_ones  = -1 // For "inexect" constant create
 }
@@ -681,20 +685,39 @@ _SINCOS_COMMON2:
 ////////// x = 0/Inf/NaN path //////////////////
 _SINCOS_SPECIAL_ARGS:
 .pred.rel "mutex",p8,p9
+
+{ .mfi
+      nop.m         999
+      fclass.m.unc  p7,p0               = f8, 0x23 // is x +/- inf?
+      nop.i         999;;
+}
+
+{ .mfi
+      nop.m         999
+(p7)  fmerge.s      f9 = f8,f8
+      nop.i         999
+}
+
 // sin(+/-0) = +/-0
 // sin(Inf)  = NaN
 // sin(NaN)  = NaN
 { .mfi
       nop.m         999
 (p8)  fma.d.s0      f8                  = f8, f0, f0 // sin(+/-0,NaN,Inf)
-      nop.i         999
+(p8)  mov           GR_Parameter_TAG    = 280
 }
 // cos(+/-0) = 1.0
 // cos(Inf)  = NaN
 // cos(NaN)  = NaN
-{ .mfb
+{ .mfi
       nop.m         999
 (p9)  fma.d.s0      f8                  = f8, f0, f1 // cos(+/-0,NaN,Inf)
+(p9)  mov           GR_Parameter_TAG    = 277
+}
+
+{ .mbb
+      nop.m         999
+(p7)  br.cond.spnt  __libm_error_region
       br.ret.sptk   b0 // Exit for x = 0/Inf/NaN path
 };;
 
@@ -766,3 +789,54 @@ LOCAL_LIBM_END(__libm_callout_sincos)
 .type    __libm_cos_large#,@function
 .global  __libm_cos_large#
 
+LOCAL_LIBM_ENTRY(__libm_error_region)
+.prologue
+{ .mfi
+        add   GR_Parameter_Y=-32,sp             // Parameter 2 value
+        nop.f 0
+.save   ar.pfs,GR_SAVE_PFS
+        mov  GR_SAVE_PFS=ar.pfs                 // Save ar.pfs
+}
+{ .mfi
+.fframe 64
+        add sp=-64,sp                           // Create new stack
+        nop.f 0
+        mov GR_SAVE_GP=gp                       // Save gp
+};;
+{ .mmi
+        stfd [GR_Parameter_Y] = f1,16           // STORE Parameter 2 on stack
+        add GR_Parameter_X = 16,sp              // Parameter 1 address
+.save   b0, GR_SAVE_B0
+        mov GR_SAVE_B0=b0                       // Save b0
+};;
+.body
+{ .mib
+        stfd [GR_Parameter_X] = f9              // STORE Parameter 1 on stack
+        add   GR_Parameter_RESULT = 0,GR_Parameter_Y  // Parameter 3 address
+        nop.b 0
+}
+{ .mib
+        stfd [GR_Parameter_Y] = f8              // STORE Parameter 3 on stack
+        add   GR_Parameter_Y = -16,GR_Parameter_Y
+        br.call.sptk b0=__libm_error_support#   // Call error handling function
+};;
+{ .mmi
+        add   GR_Parameter_RESULT = 48,sp
+        nop.m 0
+        nop.i 0
+};;
+{ .mmi
+        ldfd  f8 = [GR_Parameter_RESULT]       // Get return result off stack
+.restore sp
+        add   sp = 64,sp                       // Restore stack pointer
+        mov   b0 = GR_SAVE_B0                  // Restore return address
+};;
+{ .mib
+        mov   gp = GR_SAVE_GP                  // Restore gp
+        mov   ar.pfs = GR_SAVE_PFS             // Restore ar.pfs
+        br.ret.sptk     b0                     // Return
+};;
+
+LOCAL_LIBM_END(__libm_error_region)
+.type   __libm_error_support#,@function
+.global __libm_error_support#
diff --git a/sysdeps/ia64/fpu/s_cosf.S b/sysdeps/ia64/fpu/s_cosf.S
index bcdf1b0..f0bc9a8 100644
--- a/sysdeps/ia64/fpu/s_cosf.S
+++ b/sysdeps/ia64/fpu/s_cosf.S
@@ -171,7 +171,7 @@
 //==============================================================
 // general input registers:
 // r14 -> r19
-// r32 -> r45
+// r32 -> r43
 
 // predicate registers used:
 // p6 -> p14
@@ -260,6 +260,11 @@ GR_SAVE_PFS                     = r41
 GR_SAVE_B0                      = r42
 GR_SAVE_GP                      = r43
 
+GR_Parameter_X                  = r44
+GR_Parameter_Y                  = r45
+GR_Parameter_RESULT             = r46
+GR_Parameter_TAG                = r47
+
 RODATA
 .align 16
 
@@ -389,7 +394,7 @@ LOCAL_OBJECT_END(double_sin_cos_beta_k4)
 GLOBAL_IEEE754_ENTRY(sinf)
 
 { .mlx
-      alloc         r32                 = ar.pfs,1,13,0,0
+      alloc         r32                 = ar.pfs,1,11,4,0
       movl  sincosf_GR_sig_inv_pi_by_16 = 0xA2F9836E4E44152A //signd of 16/pi
 }
 { .mlx
@@ -413,7 +418,7 @@ GLOBAL_IEEE754_END(sinf)
 GLOBAL_IEEE754_ENTRY(cosf)
 
 { .mlx
-      alloc         r32                 = ar.pfs,1,13,0,0
+      alloc         r32                 = ar.pfs,1,11,4,0
       movl  sincosf_GR_sig_inv_pi_by_16 = 0xA2F9836E4E44152A //signd of 16/pi
 }
 { .mlx
@@ -641,20 +646,39 @@ _SINCOSF_COMMON:
 ////////// x = 0/Inf/NaN path //////////////////
 _SINCOSF_SPECIAL_ARGS:
 .pred.rel "mutex",p8,p9
+
+{ .mfi
+      nop.m         999
+      fclass.m.unc  p7,p0               = f8, 0x23 // is x +/- inf?
+      nop.i         999;;
+}
+
+{ .mfi
+      nop.m         999
+(p7)  fmerge.s      f9 = f8,f8
+      nop.i         999
+}
+
 // sinf(+/-0) = +/-0
 // sinf(Inf)  = NaN
 // sinf(NaN)  = NaN
 { .mfi
       nop.m         999
 (p8)  fma.s.s0      f8                  = f8, f0, f0 // sinf(+/-0,NaN,Inf)
-      nop.i         999
+(p8)  mov           GR_Parameter_TAG    = 281
 }
 // cosf(+/-0) = 1.0
 // cosf(Inf)  = NaN
 // cosf(NaN)  = NaN
-{ .mfb
+{ .mfi
       nop.m         999
 (p9)  fma.s.s0      f8                  = f8, f0, f1 // cosf(+/-0,NaN,Inf)
+(p9)  mov           GR_Parameter_TAG    = 278
+};;
+
+{ .mbb
+      nop.m         999
+(p7)  br.cond.spnt  __libm_error_region
       br.ret.sptk   b0 // Exit for x = 0/Inf/NaN path
 };;
 
@@ -715,3 +739,54 @@ LOCAL_LIBM_END(__libm_callout_sincosf)
 .type    __libm_cos_large#, @function
 .global  __libm_cos_large#
 
+LOCAL_LIBM_ENTRY(__libm_error_region)
+.prologue
+{ .mfi
+        add   GR_Parameter_Y=-32,sp             // Parameter 2 value
+        nop.f 0
+.save   ar.pfs,GR_SAVE_PFS
+        mov  GR_SAVE_PFS=ar.pfs                 // Save ar.pfs
+}
+{ .mfi
+.fframe 64
+        add sp=-64,sp                           // Create new stack
+        nop.f 0
+        mov GR_SAVE_GP=gp                       // Save gp
+};;
+{ .mmi
+        stfd [GR_Parameter_Y] = f1,16           // STORE Parameter 2 on stack
+        add GR_Parameter_X = 16,sp              // Parameter 1 address
+.save   b0, GR_SAVE_B0
+        mov GR_SAVE_B0=b0                       // Save b0
+};;
+.body
+{ .mib
+        stfd [GR_Parameter_X] = f9              // STORE Parameter 1 on stack
+        add   GR_Parameter_RESULT = 0,GR_Parameter_Y  // Parameter 3 address
+        nop.b 0
+}
+{ .mib
+        stfd [GR_Parameter_Y] = f8              // STORE Parameter 3 on stack
+        add   GR_Parameter_Y = -16,GR_Parameter_Y
+        br.call.sptk b0=__libm_error_support#   // Call error handling function
+};;
+{ .mmi
+        add   GR_Parameter_RESULT = 48,sp
+        nop.m 0
+        nop.i 0
+};;
+{ .mmi
+        ldfd  f8 = [GR_Parameter_RESULT]       // Get return result off stack
+.restore sp
+        add   sp = 64,sp                       // Restore stack pointer
+        mov   b0 = GR_SAVE_B0                  // Restore return address
+};;
+{ .mib
+        mov   gp = GR_SAVE_GP                  // Restore gp
+        mov   ar.pfs = GR_SAVE_PFS             // Restore ar.pfs
+        br.ret.sptk     b0                     // Return
+};;
+
+LOCAL_LIBM_END(__libm_error_region)
+.type   __libm_error_support#,@function
+.global __libm_error_support#
diff --git a/sysdeps/ia64/fpu/s_cosl.S b/sysdeps/ia64/fpu/s_cosl.S
index 8d71e50..8bb330e 100644
--- a/sysdeps/ia64/fpu/s_cosl.S
+++ b/sysdeps/ia64/fpu/s_cosl.S
@@ -747,12 +747,16 @@ GR_SAVE_B0     = r39
 GR_SAVE_GP     = r40
 GR_SAVE_PFS    = r41
 
+GR_Parameter_X = r59
+GR_Parameter_Y = r60
+GR_Parameter_RESULT = r61
+GR_Parameter_TAG = r62
 
 .section .text
 
 GLOBAL_IEEE754_ENTRY(sinl)
 { .mlx
-      alloc r32 = ar.pfs,0,27,2,0
+      alloc r32 = ar.pfs,1,26,4,0
       movl GR_sig_inv_pi = 0xa2f9836e4e44152a // significand of 1/pi
 }
 { .mlx
@@ -777,7 +781,7 @@ GLOBAL_IEEE754_END(sinl)
 
 GLOBAL_IEEE754_ENTRY(cosl)
 { .mlx
-      alloc r32 = ar.pfs,0,27,2,0
+      alloc r32 = ar.pfs,1,26,4,0
       movl GR_sig_inv_pi = 0xa2f9836e4e44152a // significand of 1/pi
 }
 { .mlx
@@ -2278,13 +2282,31 @@ SINCOSL_DENORMAL:
 SINCOSL_SPECIAL:
 { .mfb
         nop.m 999
+        fclass.m.unc p6,p0 = f8, 0x23 // is x +/- inf?
+        nop.b 999;;
+}
+
+{ .mfi
+        nop.m 999
+(p6)    fmerge.s f9 = f8,f8
+(p6)    cmp.eq.unc p7, p8 = 0x1, GR_Sin_or_Cos;;
+}
+
+{ .mmf
+(p7)    mov GR_Parameter_TAG = 276        // (cosl)
+(p8)    mov GR_Parameter_TAG = 279        // (sinl)
 //
 //      Path for Arg = +/- QNaN, SNaN, Inf
 //      Invalid can be raised. SNaNs
 //      become QNaNs
 //
         fmpy.s0 FR_Result = FR_Input_X, f0
-        br.ret.sptk   b0 ;;
+}
+
+{ .mbb
+        nop.m 999
+(p6)    br.cond.spnt __libm_error_region
+        br.ret.sptk b0 ;;
 }
 
 GLOBAL_IEEE754_END(cosl)
@@ -2363,3 +2385,55 @@ SINCOSL_ARG_TOO_LARGE:
 LOCAL_LIBM_END(__libm_callout)
 .type   __libm_pi_by_2_reduce#,@function
 .global __libm_pi_by_2_reduce#
+
+LOCAL_LIBM_ENTRY(__libm_error_region)
+.prologue
+{ .mfi
+        add   GR_Parameter_Y=-32,sp             // Parameter 2 value
+        nop.f 0
+.save   ar.pfs,GR_SAVE_PFS
+        mov  GR_SAVE_PFS=ar.pfs                 // Save ar.pfs
+}
+{ .mfi
+.fframe 64
+        add sp=-64,sp                           // Create new stack
+        nop.f 0
+        mov GR_SAVE_GP=gp                       // Save gp
+};;
+{ .mmi
+        stfd [GR_Parameter_Y] = f1,16           // STORE Parameter 2 on stack
+        add GR_Parameter_X = 16,sp              // Parameter 1 address
+.save   b0, GR_SAVE_B0
+        mov GR_SAVE_B0=b0                       // Save b0
+};;
+.body
+{ .mib
+        stfd [GR_Parameter_X] = f9              // STORE Parameter 1 on stack
+        add   GR_Parameter_RESULT = 0,GR_Parameter_Y  // Parameter 3 address
+        nop.b 0
+}
+{ .mib
+        stfd [GR_Parameter_Y] = f8              // STORE Parameter 3 on stack
+        add   GR_Parameter_Y = -16,GR_Parameter_Y
+        br.call.sptk b0=__libm_error_support#   // Call error handling function
+};;
+{ .mmi
+        add   GR_Parameter_RESULT = 48,sp
+        nop.m 0
+        nop.i 0
+};;
+{ .mmi
+        ldfd  f8 = [GR_Parameter_RESULT]       // Get return result off stack
+.restore sp
+        add   sp = 64,sp                       // Restore stack pointer
+        mov   b0 = GR_SAVE_B0                  // Restore return address
+};;
+{ .mib
+        mov   gp = GR_SAVE_GP                  // Restore gp
+        mov   ar.pfs = GR_SAVE_PFS             // Restore ar.pfs
+        br.ret.sptk     b0                     // Return
+};;
+
+LOCAL_LIBM_END(__libm_error_region)
+.type   __libm_error_support#,@function
+.global __libm_error_support#
diff --git a/sysdeps/ia64/fpu/s_tan.S b/sysdeps/ia64/fpu/s_tan.S
index a2f80c8..a4b42c9 100644
--- a/sysdeps/ia64/fpu/s_tan.S
+++ b/sysdeps/ia64/fpu/s_tan.S
@@ -348,15 +348,10 @@ COMMON_PATH:
 (p6)  br.ret.spnt    b0    ;;         // Exit for x=0 (tan only)
 }
 
-{ .mfi
+{ .mmi
       ldfpd     tan_P14,tan_P15 = [tan_AD],16
-(p7)  frcpa.s0  f8,p9=f0,f0           // Set qnan indef if x=inf
-      mov       tan_GR_10009 = 0x10009
-}
-{ .mib
       ldfpd      tan_Q8,tan_Q9  = [tan_ADQ],16
-      nop.i 999
-(p7)  br.ret.spnt    b0    ;;         // Exit for x=inf
+      mov       tan_GR_10009 = 0x10009;;
 }
 
 { .mfi
@@ -384,6 +379,12 @@ COMMON_PATH:
       fma.s1 TAN_W_2TO64_RSH = tan_NORM_f8,TAN_INV_PI_BY_2_2TO64,TAN_RSHF_2TO64
 };;
 
+{ .mfb
+(p7)  mov GR_Parameter_Tag = 283          // (tan)
+(p7)  frcpa.s0  f8,p9=f0,f0               // Set qnan indef if x=inf
+(p7)  br.cond.spnt __libm_error_region ;; // call error support if tan(+-inf)
+}
+
 { .mmf
       ldfpd      tan_P10,tan_P11 = [tan_AD],16
       and       tan_exp = tan_GR_17_ones, tan_signexp
diff --git a/sysdeps/ia64/fpu/s_tanf.S b/sysdeps/ia64/fpu/s_tanf.S
index 193d756..cd0febb 100644
--- a/sysdeps/ia64/fpu/s_tanf.S
+++ b/sysdeps/ia64/fpu/s_tanf.S
@@ -301,11 +301,11 @@ Common_Path:
 { .mfi
       cmp.ge    p6, p0      = rSignMask, rExpCut    // p6 = (E => 0x10009)
 (p8)  frcpa.s0  f8, p0      = f0, f0                // Set qnan indef if x=inf
-      mov GR_Parameter_Tag  = 227                   // (cotf)
+      mov GR_Parameter_Tag  = 284                   // (tanf)
 }
 { .mbb
       ldfe      fPiby2      = [rCoeffB], 16
-(p8)  br.ret.spnt b0                                // Exit for x=inf
+(p8)  br.cond.spnt __libm_error_region              // call error support if tanf(+-0)
 (p6)  br.cond.spnt Huge_Argument                    // Branch if |x|>=2^10
 }
 ;;
@@ -313,7 +313,7 @@ Common_Path:
 { .mfi
       nop.m     0
 (p11) fclass.m.unc p6, p0   = f8, 0x07              // Test for x=0 (for cotf)
-      nop.i     0
+      mov GR_Parameter_Tag  = 227                   // (cotf)
 }
 { .mfb
       nop.m     0
diff --git a/sysdeps/ia64/fpu/s_tanl.S b/sysdeps/ia64/fpu/s_tanl.S
index 607a271..95d5145 100644
--- a/sysdeps/ia64/fpu/s_tanl.S
+++ b/sysdeps/ia64/fpu/s_tanl.S
@@ -3072,21 +3072,32 @@ TANL_UNSUPPORTED:
 
 { .mfi
       nop.m 999
-(p6)  fclass.m p6, p7 = f8, 0x7         // Test for zero (cotl only)
+(p6)  fclass.m.unc p6, p0 = f8, 0x7     // Test for zero (cotl only)
+      nop.i 999
+}
+;;
+{ .mfi
+      nop.m 999
+(p7)  fclass.m.unc p7, p0 = f8, 0x23    // Test for inf (tanl only)
       nop.i 999
 }
 ;;
 
 .pred.rel "mutex", p6, p7
-{ .mfi
+{ .mfb
 (p6)  mov GR_Parameter_Tag = 225        // (cotl)
 (p6)  frcpa.s0  f8, p0 = f1, f8         // cotl(+-0) = +-Inf
-      nop.i 999
+(p6)  br.cond.spnt __libm_error_region;;
+}
+{ .mfb
+(p7)  mov GR_Parameter_Tag = 282        // (tanl)
+      fmpy.s0 f8 = f8, f0
+(p7)  br.cond.spnt __libm_error_region;;
 }
 { .mfb
       nop.m 999
-(p7)  fmpy.s0 f8 = f8, f0
-(p7)  br.ret.sptk b0
+      nop.f 999
+      br.ret.sptk b0
 }
 ;;